Full-Range Three-Stage 16GSa/s Riemann Pump RF-Power DAC in GaN HEMT


In this study, we proposed a new encoding method to reduce power consumption and expanding the bit resolution of Riemann Pump (RP) digital-to-analog converters (DAC). In addition, a new circuit topology was demonstrated enabling highside and low-side GaN transistors to operate independently such that the power consumption is significantly reduced by preventing unnecessary current flow. Moreover, our design realizes higher bit-level compared with the state-of-the-art complementary encoding method. We designed and fabricated a 3.9-bit RP using 0.15um GaN process to validate its performance benefit. The simulation with practical device models confirms that our design can reduce power consumption and increase the bit-level with at least 16GSa/s sampling rate, which is the highest sampling rate reported so far in GaN technology to the best of our knowledge.