TR97-08
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
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- "ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing", Tech. Rep. TR97-08, Mitsubishi Electric Research Laboratories, Cambridge, MA, July 1997.BibTeX TR97-08 PDF
- @techreport{MERL_TR97-08,
- author = {Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Lawrence Snyder},
- title = {ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing},
- institution = {MERL - Mitsubishi Electric Research Laboratories},
- address = {Cambridge, MA 02139},
- number = {TR97-08},
- month = jul,
- year = 1997,
- url = {https://www.merl.com/publications/TR97-08/}
- }
,
- "ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing", Tech. Rep. TR97-08, Mitsubishi Electric Research Laboratories, Cambridge, MA, July 1997.
Abstract:
In recent years, the Chaos Project at the University of Washington has analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the chaotic routing algorithm (a.k.a. Chaos) has been the most successful. Although the Chaos router was developed for multicomputer routing, the project has recently directed its attention towards the application of Chaos technology to LAN switching. The present task is to implement a gigabit LAN called ChaosLAN, based on a centralized switch (hub) and high speed serial links to workstations. The switch itself is a fully-populated two-dimensional torus network of Chaos routers. The host adapter is Digital\'s PCI Pamette card. To evaluate the performance of ChaosLAN, we are supporting the Global Memory System (GMS), a type of distributed virtual memory also developed at UW. We also describe an application involving real-time haptic rendering used in a surgical simulator.