TR2018-075

An FPGA-based Multi-level All-Digital Transmitter with 1.25 GHz of Bandwidth



This paper presents the first real-time FieldProgrammable Gate Array (FPGA)-based All-Digital Transmitter architecture with a usable bandwidth of 1.25 GHz. The proposed architecture was implemented and embedded into an FPGA, and the results surpass the reported state-of-the-art. Measurement results in terms of Signal-to-Noise Ratio (SNR) and Error-Vector Magnitude (EVM) are presented and discussed. Specifically, modulated signals of 1.25 GHz of bandwidth were successfully transmitted with 30.51 dB of SNR and 2.23% of EVM.