TR2008-015

Energy Efficient and High Speed On-Chip Ternary Bus
Citation: Duan, C.; Khatri, S.P., "Energy Efficient and High Speed On-Chip Ternary Bus", Design, Automation and Test in Europe, ISBN: 978-3-9810801-4-8, pp. 515-518, March 2008 (IEEE Explore)
Date:March 2008
MERL Contact:Chunjie Duan

We propose two crosstalk reducing coding schemes using ternary busses. In addition to low power consumption and reduced delay, our schemes offer other advantages over binary coding schemes such as zero area overhead and simple, regular and fast CODEC design.

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