Low-Latency Decoding of EG LDPC Codes

    •  Zhang, J.; Yedidia, J.S.; Fossorier, M.P.C., "Low-Latency Decoding of EG LDPC Codes", Journal of Lightwave Technology, Vol. 25, No. 9, pp. 2879-2886, September 2007.
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      • @article{Zhang2007sep1,
      • author = {Zhang, J. and Yedidia, J.S. and Fossorier, M.P.C.},
      • title = {Low-Latency Decoding of EG LDPC Codes},
      • journal = {Journal of Lightwave Technology},
      • year = 2007,
      • volume = 25,
      • number = 9,
      • pages = {2879--2886},
      • month = sep,
      • url = {}
      • }
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We were able to demonstrate that EG-LDPC codes decoded with a bit-flipping decoder will not suffer from an error-floor problem.

We describe simple iterative decodes for low-density parity-check codes based on Euclidean geometries, suitable for practical very-large-scale-integration implementation in applications requiring very fast decoders. The decoders are based on shuffled and replica-shuffled versions of iterative bit-flipping (BF) and quantized weighted BF schemes. The proposed decoders converge faster and provide better ultimate performance than standard BF decoders. We present simulations that illustrate the performance versus complexity tradeoffs for these decoders. We can show in some cases through importance sampling that no significant error floor exists.