Front-End of a Digital ATV Receiver
MERL has developed the front-end of a digital ATV receiver. The project included several generations of front-end evaluation boards. These boards were tested in the lab and with real terrestrial broadcast signals in New York (CBS) and in Washington (WHD-TV).
Background & Objective: In North America, the digital HDTV standard was accepted in December, 1996. In the near future, there will be a multi-billion dollar market for Advanced (High Definition) TV receivers. MERL started this project with the design of a tuner for HDTV. The other part of this project was a development effort on a digital Demodulator chip AV8100 (joint development with Lucent Technology). MERL developed a prototype of the HDTV tuner and tested it together with a Demodulator prototype. As a result of these activities the final concept for a digital ATV front-end was developed. Finally, MERL developed a Test and Evaluation Board and performed extensive lab and field testing. MERL has submitted 3 conference reports , and 2 papers describing this project.
Technical Discussion: A functional block diagram of the front-end of a Digital ATV receiver is illustrated in the figure above. A double conversion tuner, used for cable DTV, according to our specification was modified by the manufacturer in order to increase the gain, the AGC dynamic range, and reduce the noise figure. A total AGC range of 80 dB (UHF) to 85 dB (VHF) was achieved by combining the AGC of the tuner and the downconverter. The AGC data from the demodulator is processed by the on-board microprocessor using an AGC algorithm. For each level of the input signal, the AGC algorithm optimizes the signal-to-noise ratio and minimizes the distortion. The on-board microprocessor sets up the tuner and demodulator. When a new channel command is received from the host over the I2C bus, the on-board microprocessor sends a data sequence to the tuner's PLL synthesizers and downloads the new channel's equalizer coefficients to the demodulator. As part of the channel sequence procedure, the demodulator is monitored for "front-end locked", "equalizer convergence", and "valid MPEG2 transport stream output" status. A control board interface was incorporated for the purposes of testing, evaluating, and diagnosing the prototype board. The output of the prototype board is a 188 byte parallel MPEG2 transport stream at 2.69 Mbytes/s for 8-VSB terrestrial broadcast.
Outside Collaborations: Lucent Technologies, Panasonic, Sanyo, Hewlett-Packard, ATTC, WHD-TV, CBS, and MSTV.
Contact: Johnas Cukier
Technology Area: Advanced Digital Television
Modification Date: September 12, 2007
